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Ordering number : ENA1112
Monolithic Digital IC
LB11852FV
Overview
For Fan Motor
Single-phase Full-wave Pre-driver with Speed Control Function
The LB11852FV is a single-phase bipolar driving motor pre-driver with a speed control function based on speed feedback. With a small number of external parts, a highly efficient and very quiet variable-speed drive fan motor with low power consumption and high rotational accuracy can be implemented. The LB11852FV, integrated in a miniature package, is best suited for driving small fan motors requiring speed control.
Features
* Single-phase full-wave driving pre-driver With a PMOS-NMOS device used as the external power transistor, low saturation output and a single-phase full-wave drive enable a high-efficiency drive with low power consumption. * Speed control circuit incorporated Compared with open-loop control, a closed-loop control function that uses speed feedback to control the speed makes it possible to improve the rotational speed accuracy and reduce the variations in the rotational speed caused by fluctuations in the supply voltage or load. The separately excited upper direct PWM method is featured as the variable speed system. * Variable speed control is possible with external PWM input or analog voltage input The speed control input signal is compatible with PWM duty ratio and analog voltages. * Soft start circuit incorporated * Minimum speed setting pin The minimum speed can be set using an external resistor. * Current limiting circuit incorporated Chopper type current limit at startup or lock. * Reactive current cut circuit incorporated Reactive current before phase changeover is cut, ensuring highly silent and low power-consumption drive. * Automatic resetting type constraint circuit incorporated * FG (rotational speed detection) output
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40208 MS PC 20080225-S00005 No.A1112-1/12
LB11852FV
Specifications
Absolute Maximum Ratings at Ta = 25C
Parameter VCC pin maximum supply voltage OUTN pin maximum output current OUTP pin maximum Sink current OUT pin output withstand voltage HB maximum output current CTL, C pin withstand voltage CVI, LIM pin withstand voltage RD/FG output pin output withstand voltage RD/FG output current 5VREG pin maximum output current Allowable power dissipation Operating temperature Storage temperature FG max I5VREG max Pd max Topr Tstg Mounted on a specified board *1 10 10 0.8 -30 to 95 -55 to 150 mA mA W C C Symbol VCC max IOUTN max IOUTP max VOUT max HB CTL, C max CVI, LIM max FG max 19 V Conditions Ratings 18 20 20 18 10 7 7 Unit V mA mA V mA V V
*1 Mounted on a specified board : 114.3mmx76.1mmx1.6mm, glass epoxy *2 Tj max = 150C. Use the device in a condition that the chip temperature does not exceed Tj = 150C during operation.
Recommended Operating Conditions at Ta = 25C
Parameter VCC supply voltage 1 VCC supply voltage 2 CTL input voltage range LIM input voltage range VCI input voltage range Hall input common phase input voltage range Symbol VCC1 VCC2 VCTL VLIM VCVI VICM VCC pin VCC -5VREG Conditions Ratings 5.5 to 16 4.5 to 5.5 0 to 5VREG 0 to 5VREG 0 to 5VREG 0.2 to 3 Unit V V V V V V
Electrical Characteristics at Ta = 25C, VCC = 12V, unless otherwise specified
Parameter Circuit current Symbol ICC1 ICC2 5VREG voltage Current limiting voltage CPWM pin H level voltage CPWM pin L level voltage CPWM pin charge current CPWM pin discharge current CPWM oscillation frequency CT pin H level voltage CT pin L level voltage CT pin charge current CT pin discharge current CT pin charge/discharge current ratio OUTN pin output H voltage OUTN pin output L voltage OUTP pin output L voltage Hall input sensitivity 5VREG VLIM VCRH VCRL ICPWM1 ICPWM2 FPWM VCTH VCTL ICT1 ICT2 RCT VONH VONL VOPL VHN VCT = 2V VCT = 2V ICT1/ICT2 IO = 10mA IO = 10mA IO = 10mA IN+, IN- differential voltage (including offset and hysteresis) Continued on next page. VCPWM = 0.5V VCPWM = 3.5V C = 220pF 2.8 0.9 1.6 0.16 8 During drive During lock protection I5VREG = 5mA 4.8 190 2.8 0.9 24 21 Conditions Ratings min typ 12 12 5.0 210 3.0 1.1 30 27 30 3.0 1.1 2.0 0.20 10 VCC-0.85 0.9 0.5 15 3.2 1.3 2.5 0.25 12 VCC-1.0 1.0 0.65 25 max 15 15 5.2 230 3.2 1.3 36 33 Unit mA mA V mV V V A A kHz V V A A times V V V mV
No.A1112-2/12
LB11852FV
Continued from preceding page. Parameter FG output L voltage FG pin leak current EO pin output H voltage EO pin output L voltage RC pin output H voltage RC pin output L voltage RC pin clamp voltage CTL pin input H voltage CTL pin input L voltage CTL pin input open voltage CTL pin H input H current CTL pin L input L current C pin output H voltage C pin output L voltage LIM pin input bias current LIM pin common phase input voltage range SOFT pin charge current SOFT pin operating voltage range ICSOFT VISOFT 1.0 2.0 1.3 1.6 VREG A V Symbol VFGL IFGL VEOH VEOL VRCH VRCL VRCCLP VCTLH VCTLL VCTLO ICTLH ICTLL VCH VCL IBLIM VILIM VFGIN = 5VREG VFGIN = 0V IFG = 5mA VFG = 19V IEO1 = -0.2mA IEO1 = 0.2mA 3.2 0.7 1.3 2.0 0 VREG-0.5 -10 -120 VREG-0.3 1.8 -1 2.0 0 -90 VREG-0.1 2.0 2.2 1 VREG VREG-1.2 VREG-0.8 0.8 3.45 0.8 1.5 1.1 3.7 1.05 1.7 VREG 1.0 VREG 10 Conditions Ratings min typ 0.15 max 0.30 30 Unit V A V V V V V V V V A A V V A V
Package Dimensions
unit : mm (typ) 3360
1.0
Pd max -- Ta
When mounted on the thermal resistance evaluation board
0.80
20
Allowable power dissipation, Pd max - W
5.2
0.8
4.4 6.4
0.6
12 0.5 (0.35)
1.5 MAX (1.3)
0.5
0.22
0.15
0.4
Independent IC
0.2
0.30
0.35
0.13 0 - 30
0.1
0
30
60
90
120
Ambient temperature, Ta - C
SANYO : SSOP20J(225mil)
No.A1112-3/12
LB11852FV
Truth table
Lock protection CPWM = H
INH L H L IN+ L H L H CT L OUT1P L OFF OFF OFF OUT1N L H L H OUT2P OFF L OFF OFF OUT2N H L H L FG L OFF L OFF Mode OUT1 2 drive OUT2 1 drive Lock protection
H
Speed control CT = L
EO L CPWM H INH L H L IN+ L H L H OUT1P L OFF OFF OFF OUT1N L H L H OUT2P OFF L OFF OFF OUT2N H L H L Mode OUT1 2 drive OUT2 1 drive Regeneration mode
H
L
Pin Assignment
OUT2P 1 OUT2N 2 VCC 3 SENCE 4 C5 CTL 6 RC 7 SOFT 8 CPWM 9 FG 10
20 OUT1P 19 OUT1N 18 SGND 17 5VREG 16 EO 15 EI 14 LIM 13 CT 12 IN+ 11 IN-
Top view
No.A1112-4/12
FG
CT
Block Diagram
VCC Discharge circuit Thermal shat down
VCC
VREG
5VREG
OUT1 N OUT1 P EDEG F G
RC
1shot multi
LIM CONTROL CIRCUIT
OUT2 N OUT2 P
LB11852FV
SOFT VREF
5VREG
C
CTL signal EI EO
CTL
Oscillation
CTL IN+ 5VREG HALL INCPW M SENSE GND
No.A1112-5/12
LB11852FV
Sample Application Circuit
*3
1F/25V
Rp = 1k
1
3
2 100
4
RF
1F/25V
*2
RFG/RRD = 10k to 100k VCC 5VREG SENSE RC LIM SOFT C OUT1P OUT1N OUT2P OUT2N ININ+ CT *5 SGND *1 CPWM *6 CP = 220pF 30kHz CP = 1F *7 1 2 3 4 *4 H 5VREG
*8
CTLsignal
CTL EL EO
No.A1112-6/12
LB11852FV
Description of Pre-driver Bock *1 : Power-GND wiring The SGND is connected to the control circuit power supply system. *2 : Power stabilization capacitor For the power stabilization capacitor on the signal side, use a capacitor of 0.1F or more. Connect the capacitor between VCC and GND with a thick and along the shortest possible route. *3 : Power-side power stabilization capacitor For the power-side power stabilization capacitor, use a capacitor of 1F or more. Connect the capacitor between the power-side power supply and GND with a thick and along the shortest possible route. *4 : IN+, IN- pins Hall signal input pins Wiring should be short to prevent noise from being carried. If noise is carried, insert a capacitor between the IN+ and IN- pins. The Hall input circuit functions as a comparator with hysteresis (15mV). It also has a soft switch zone with 30mV (input signal difference voltage). It is also recommended that the Hall input level should be a minimum of 100mV (p-p). *5 : CPWM pin Pin to connect the capacitor used to generate the PWM basic frequency Use of CP = 200pF causes oscillation at f = 30kHz, which is the basic frequency of PWM. As this is also used for the current limiter reset signal, a capacitor must be connected even if the speed is not going to be controlled. *6 : CT pin Pin to connect the capacitor used for lock detection The constant-current charging and constant-current discharging circuits incorporated cause locking when the pin voltage reaches 3.0V, and releasing the lock protection when it drops to 1.0V. Connect this pin to the GND when it is not to be used (locking not necessary). *7 : SENSE pin Current limiter detection pin When the pin voltage exceeds 0.21V, the current limiter is activated, and operation enters lower regeneration mode. Connect this pin to the GND when it is not to be used. *8 : FG pin Rotational speed detection pin This is an open collector output that can detect the rotational speed using the FG output corresponding to the phase changeover. Keep this pin open when it is not to be used.
No.A1112-7/12
LB11852FV
Description of Speed Control Block 1. Speed control diagram
The slope is determined by the RC pin constant. (RPM) CR time constant large CR time constant small
Rotational speed
Minimum speed
Determined by LIM pin voltage
0%
Small CTL signal (PWMDUTY) Large Large EO pin voltage (V) Small
100%
Minimum speed setting rotation
Variable speed
Full speed
On-duty small
On-duty large
CTL pin
5VREG LIM voltage
EO pin EO voltage 0V
2. Timing at startup (soft start)
VCC pin
CTL pin
Stop
Full speed Soft start The slope changes depending on the capacitance of the SOFT pin (large capacitance large slope).
SOFT pin
Stop
Full speed
No.A1112-8/12
LB11852FV
2. Supplementary description of operations By inputting the duty pulses, a feedback loop is formed inside the LB11852 IC to establish the FG period (rotational speed of the motor) that corresponds to the control voltage of the pulses.
LB11852
FG CTL Signal CTL Speed control block Pre-driver block
Closed Feed-Back Loop CONTROL SIGNAL
The operation inside the IC is as flows. pulse signals are created from the edges of the FG signals as shown in the figure below, and using these signals as a reference, waveforms with a pulse width determined by the CR time constant are generated using a one-shot multivibrator. These pulse waveforms are then integrated to control the duty ratio of the pre-driver output as the control voltage.
FG
Edge pulse
RC pin
Slope determined by CR time constant
One-shot multivibrator output TRC (sec) = 1.15RC
By changing the pulse width as determined by the CR time constant, the VCTL versus rotational speed slope can be adjusted as shown in the speed control diagram in the previous section. However, since pulses that are determined by the CR time constant are used, the CR variations are output as-is as the speed control error.
No.A1112-9/12
LB11852FV
4. Procedure for calculating the constant RC pin The slope shown in the speed control diagram is determined by the constant of the RC pin.
(RPM) Motor at maximum speed
0%
CTL Duty(%)
100%
1) Obtain the FG signal frequency fFG (Hz) at the maximum rotational speed of the motor (with two FG pulses per rotation). fFG (Hz) = 2 rpm/60 ... (1) 2) Obtain the time constant of the components connected to the RC pin (use the duty ratio (example : 100% = 1.0 or 60% = 0.6) as the CTL duty ratio for achieving the maximum rotational speed). R x C = Duty ratio/ (3.3 x 1.1 x fFG) ... (2) 3) Obtain the resistance and the capacitance of the capacitor. Based on the discharge capability of the RC pin, the capacitance of the capacitor which can be used is in the range of 0.01F to 0.015F. Therefore, obtain the appropriate resistance from the result of (2) above using the formula in (3) or (4) below. R = (R x C)/0.01F ... (3) R = (R x C)/0.015F ... (4) The temperature characteristics of the curve are determined by the temperature characteristics of the capacitor of the RC pin. To minimize the variations in the rotational speed caused by temperature, a capacitor with excellent temperature characteristics must be used.
No.A1112-10/12
LB11852FV
LIM pin The minimum speed is determined by the voltage of the LIM pin.
(RPM) Maximum speed 10000
8000
6000
4000 Minimum speed setup
2000
0% 5V
CTL Duty(%) CVO pin voltage (V)
100% 2V
1) Obtain the ratio of the minimum speed required to the maximum speed. Ra = Minimum/maximum speed ... (1) In the example shown in the figure above : Ra = minimum/maximum speed = 3000/10000 = 0.3 2) Obtain the product of the duty ratio at which the maximum speed is achieved and the value in formula (1). Ca = Maximum speed duty ratio x Ra ... (2) In the example given : Ca = maximum speed duty ratio x Ra = 0.8 x 0.3 = 0.24 3) Obtain the required LIM pin voltage. LIM = 5 - (3 x Ca) ... (3) In the example given : LIM = 5 - (3 x Ca) = 5 - (3 x 0.24) 4.3V 4) Divide the resistance of 5VREG to generate the LIM voltage. In the example given, the voltage is 4.3V so the resistance ratio is 1 : 6. The resistance is 10k between 5VREG and LIM and 62k between LIM and GND.
5VREG
LIM VREF SOFT CVI
No.A1112-11/12
LB11852FV
C pin In order to connect a capacitor capable of smoothing the pin voltage to the C pin, the correlation given in the following equation must be satisfied when f (Hz) serves as the input frequency of the CTL pin. (R is incorporated inside the IC, and it is 180k (typ.).) 1/f = t < CR The higher the capacitance of the capacitor, the slower the response to changes in the input signals.
5VREF Inverted waveform of CTL pin input (same frequency) C pin CTL pin CTL circuit 180k VREF circuit A capacitor capable of the smoothing pin voltage is connected here 1/f = t < CR
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This catalog provides information as of April, 2008. Specifications and information herein are subject to change without notice. PS No.A1112-12/12

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